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Modelling the impedance of the Murata GRM035R60J475ME15#
Hello all,
I need a bit of help with the modelling of a capacitors impedance. Namely, the Murata GRM035R60J475ME15#. I am trying to get from the simulation a similar curve with the |Z| curve depicted at: https://ds.murata.co.jp/simsurfing/mlcc.html?reqtype=open_parts&partnumbers=%5B%22GRM035R60J475ME15#%22%5D&oripartnumbers=%5B%22GRM035R60J475ME15#%22%5D&graphop=mainall&focuspartnumberonlist=true&lcid=en-us However, I cannot get the right "parasitic" elements of the capacitor model that would result in the same curve. I have loaded in the GRM035R60J475ME15#_model.zip file which contains: - the .asc simulation file (including the capacitor parameters I am currently using) - the .plt file so as to configure the plot with the limits similar to the plot shown on the Murata website (for easier visual comparison of the plots) - an .emf picture file indicating which areas of the curve I am having trouble with I would greatly appreciate some help with this model. Whereas I am able to easy manipulate the point of the minimum impedance at 5GHz (by changing the ESR and the series inductance), the other elements are more difficult to adjust to my liking. For example: - I can hardly make the impedance at low frequency (100Hz) bulge without changing the capacitance itself, which, however, needs to be fixed at 4.7uF. - I cannot make the curve in the simulation simultaneously go through the following two points (through which the curve indicated on the Murata website does go through): 0.8Ohm @ 1GHz and 4.7Ohm @ 6GHz Best Regards, Cristian |
In your .asc, you use a voltage source instead of a current
source. Is this what you intend? Le 01/07/2024 à 17:10, Berceanu
Cristian via groups.io a écrit :
Hello all, |
Once the voltage source is replaced with a current source, the
impedance graph seems pretty similar to the one published by
Murata. Le 01/07/2024 à 17:25, Jerry Lee Marcel
a écrit :
|
On 01/07/2024 17:10, Berceanu Cristian
via groups.io wrote:
I need a bit of help with the modelling of a capacitors impedance. Namely, the Murata GRM035R60J475ME15#. I am trying to get from the simulation a similar curve with the |Z| curve depicted at:Are you aware you can download a SPICE model of this capacitor from Murata? SPICE model: https://ds.murata.co.jp/simserve/characteristics?ReqType=GetNetList&partnumbers=GRM035R60J475ME15# S-parameters: https://ds.murata.co.jp/simserve/characteristics?ReqType=GetSparameter&partnumbers=GRM035R60J475ME15# You should also know that there is no such capacitor parameter as "RLshunt", so your entry is ignored. I presume you mean "Rpar"? -- Regards, Tony |
On 01/07/2024 17:44, Jerry Lee Marcel wrote:
Once the voltage source is replaced with a current source, the impedance graph seems pretty similar to the one published by Murata.It makes no difference whether you use a voltage or current source, provided you plot the correct quantity. -- Regards,
Tony |
Using Murata's model produces Xc=484Ω at 100Hz and 4.7Ω at 6GHz. You
should regard that as close enough, bearing in mind that the
tolerance of the part is ±20%. It is also X5R dielectric, which a
non-negligible ΔC/ΔV, so as soon as you apply any DC the apparent
capacitance will change.
You should note that Murata's model is far more complex than LTspice's intrinsic capacitor model, so you won't get the same answer. -- Regards,
Tony |
Tony wrote, "You should also know that there is no such capacitor parameter as "RLshunt", so your entry is ignored."
Actually, there is. But it is rarely used. Because it is not included in the pop-up capacitor editing menu, it must be added explicitly with the Component Attribute Editor (Ctrl-right-click), or the Netlist line. Andy |
What is it? A capacitor in parallel with the
series resistance and inductance? On 2024-07-01 23:31, Andy I wrote:
Tony wrote, "You should also know that there is no such capacitor parameter as "RLshunt", so your entry is ignored." --
OOO - Own Opinions Only Best wishes John Woodgate, Rayleigh, Essex UK Keep trying |
Well, I'm happy to be enlightened. Pray, tell us what it does. -- Regards. Tony On 2 Jul 2024 00:31, Andy I <AI.egrps+io@...> wrote: Tony wrote, "You should also know that there is no such capacitor parameter as "RLshunt", so your entry is ignored." |
RLshunt is on the schematic on the Help page for Capacitors. It is a shunt resistor across Lser.
That makes it similar to the Rpar for an inductor. When used there, it keeps the inductor's impedance from increasing indefinitely, which might help keep simulations from aborting with something like a "time step too small" error. Andy |
Thank you all very much for your replies!
It does seem similar to the Murata one, but so does the one which results from using a voltage source. Actually, the two results are identical, but not "exactly" the way the Murata chart looks like.Jerry Lee Marcel wrote: Once the voltage source is replaced with a current source, the impedance graph seems pretty similar to the one published by Murata. Tony Casey wrote: Are you aware you can download a SPICE model of this capacitor from Murata? Now I am. I just tried it. Indeed, the resulting impedance graph is significantly closer to the original chart showed by Murata at 100Hz, 1GHz and 6GHz. But the "pit" at 5MHz is above 10mHohm, which is more than double the 5mOhm indicated in the Murata original chart. But that might just be good enough for me, I am particularly interested in using this model in transient analysis above 1GHz. Andy I wrote: RLshunt is on the schematic on the Help page for Capacitors. It is a shunt resistor across Lser. Yes, that is the case. I have also adjusted it and it definitely has an effect on the simulation results, so it certainly exists; it is not ignored. Best regards, Cristian |
Thanks. I stand corrected. I wonder why I've not noticed it before.
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However, I don't think it is at all helpful in this instance. --
Regards, Tony On 02/07/2024 02:11, Andy I wrote:
RLshunt is on the schematic on the Help page for Capacitors. It is a shunt resistor across Lser. |
Tony wrote, "However, I don't think it is at all helpful in this instance."
In this instance, I think it helps round or pull down the extreme upper frequency end of the {Z(f)| curve slightly, maybe to try to make it hit the intended values at 1 and 6 GHz. The effect is not huge, but I'm guessing it was added for that reason. As for its effect on transient simulations, I don't know. Andy |
Cristian,
The Murata capacitor model situation is interesting, and be forewarned, I made some guesses about it. As far as I can tell, the plot that you saw of impedance versus frequency, shows the impedance of their SPICE model, not the actual / measured / theoretical impedance of the capacitor. Murata has two SPICE models, "Precise" and "Simple". The Simple model is an L-C-R series circuit. The Precise model has several more elements, maybe with staggered poles and zeros. It looks as if someone at Murata put a lot of effort into tweaking it to get the absolute best-fit to measured data -- which seems like unnecessary overkill for a capacitor with such wide tolerance and variation. (But who am I to judge?) On the other hand, it makes the SPICE model's Rser change dramatically as a function of frequency, which might be critical for filtering a switching supply. Both models can be seen in the schematic in "GRM035R60J475ME15.zip" currently in the "Temp" folder. The Precise model (only) can be downloaded from the product webpage. Both models are on the SimSurfing web app where you got the plot of |Z| versus frequency. Now here is the puzzling thing. The capacitance C of both models, and the plots, is much lower than the nominal 4.7 uF. Surprise! It is about 33% lower at around 3.2 uF in both models. That explains why you could not get your model with 4.7 uF to fit their curve at 100 Hz. You really did need to accept the fact that "4.7 uF" is not fixed and had to be made smaller to match their impedance plot. Another one of their plots shows C versus frequency, and it clearly shows that C is around 3.2 uF from 100 Hz to a couple MHz. So, why is C so much lower? My guess is they wanted their models to represent minimum capacitance (maximum impedance). The combined effects of tolerance, DC voltage, AC voltage, temperature, and who knows what else, could bring it way down below nominal. If the capacitor is for supply filtering / decoupling, then it rarely hurts to get more capacitance than what you simulated with, but it might hurt if it goes the other way. As an aside, I'll mention one can make SPICE models that include the effect of voltage on C. That was not done here in these models. I think your attempt to fit the |Z| plot was very good. Although your model didn't hit the plot within a few percent, it was rather good. Many people would not worry about 25+% errors in a capacitor, depending on how it's used. If it were used in a filter (such as a tuned or active filter), it would be another matter, but you probably wouldn't use this kind of capacitor for that. Andy |
Cristian,
With all that said, ... There is something else you need to be aware of, affecting you now. SPICE inductors are perfectly ideal, as if made with superconductors that have zero resistance Rser. But in LTspice only(?), inductors that are not coupled have a default Rser of 1 mOhm. (That's milliohm.) It makes them slightly more real since you can never wind an inductor with zero wire resistance unless you have superconductors handy. Many SPICE users get fooled by simulating with ideal inductors, only to find that the real circuit can never match. Also Rser helps slightly with simulation convergence. Murata's "Precise" model has seven inductors in series, which adds up to 7 mOhm, though some are shunted with small resistance making it a little less. That extra resistance gets added to the resistance of the rest of their model. This is what increases the minimum resistance at resonance, which you noticed. I don't think Murata had LTspice in mind when they made their model. To fix that, you have to add "Rser=0" to each inductor. Murata's Precise model has seven inductors (L2, L9, L10, L11, L12, L13, L14). For example, change this line: L2 11 12 1.21e-10 to this: L2 11 12 1.21e-10 Rser=0 and do the same to the other six, and save it. Is there a simpler way? Yes and no. In LTspice's Settings (Control Panel), go to the Hacks! tab and check the checkbox for "Always default inductors to Rser=0". However, that setting affects only simulations run during the same session of LTspice, and it reverts back to Rser=1m when you close LTspice and run it again later. Note that the default Rser=1m applies only to actual inductors, with either the inductor schematic symbol, or an inductor Netlist line. It does not apply to embedded inductors such as the Lser of a capacitor or a voltage-controlled switch. Andy |
Cristian, Just to add a few quick notes to Andy's excellent answers: The Murata ceramic capacitor models are in fact based on measured data. Both the simple and precise models are curve fitted to measured impedance. Ceramic capacitors with high volumetric density are known to be nonlinear enough that the applied DC and AC voltage changes the capacitance. You can read more about these and the reasons for instance in the following blog articles: http://www.electrical-integrity.com/Quietpower_files/QuietPower-40.pdf http://www.electrical-integrity.com/Quietpower_files/QuietPower-32.pdf Istvan Novak Samtec
On 7/8/2024 10:51 PM, Andy I wrote:
Cristian, |
Cristian,
Reiner Bidenbach, an applications engineer with Analog Devices, published an article on this subject. How to Use LTspice Simulations to Account for the Effect of Voltage Dependence | Analog Devices The article discusses simulating the DC voltage effect on ceramic capacitors using LTspice. I would suggest that you download the pdf file and study it. Mike |
On Mon, Jul 1, 2024 at 11:10 AM, Berceanu Cristian wrote:
https://ds.murata.co.jp/simsurfing/mlcc.html?reqtype=open_parts&partnumbers=%5B%22GRM035R60J475ME15#%22%5D&oripartnumbers=%5B%22GRM035R60J475ME15#%22%5D&graphop=mainall&focuspartnumberonlist=true&lcid=en-usIn real life how a SMD capacitor performs at high frequencies is dependent on the device parasitics plus the effects of PADs, traces and Vias. An SMD cap in series has different parasitics than one shunted to ground. In it's simplistic form a capacitor will measure like a series LC circuit. The SMD Caps resonant frequency will be shifted by it's PADs, traces and Vias. To properly decouple a power line or provide an AC ground return that works over the frequency range of interest will require multiple capacitors in an array with each capacitor having a different self resonance frequency. I've used up to 5 different caps plus distributed microstrip elements to provide proper broadband decoupling. I measure the PCB + Caps using a VNA to confirm decoupling is adequate. |
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