Derating factor modelling

lucie.camp26@gmail.com Всі повідомлення цього користувача #154560 Hello everyone, My previous question wasn't very clear, so I'll allow myself to start a new subject. I am trying to create a capacitor model that would take into account its derating factor. The derating factor lowers the capacitance as the capacitor's voltage increases. Do you have any idea to achieve that ? My attempt to create this model is on this link https://groups.io/g/LTspice/files/Temp/Cap_Derating_factor.zip, but I would be glad to have other ideas too. I also supposed that such model has already been made by someone in the past... Thank you for your future answers and the time you'll spend trying to help me.
Andy I Всі повідомлення цього користувача #154561 lucie.camp26 asked, "Do you have any idea to achieve that ?" Did you see the messages that were posted here only yesterday? https://www.analog.com/en/resources/analog-dialogue/raqs/raq-issue-192.html https://groups.io/g/LTspice/message/154540 https://groups.io/g/LTspice/message/154544 Andy
Andy I Всі повідомлення цього користувача #154562 Also there was this message, which was posted here just a few hours ago: https://groups.io/g/LTspice/message/154544 But that was a reply to someone also named lucie.camp26. Perhaps you know them. It really helps to READ the messages that are already here. Andy
Tony Casey Всі повідомлення цього користувача #154563 On 10/07/2024 17:10, lucie.camp26@... wrote: My previous question wasn't very clear, so I'll allow myself to start a new subject. I am trying to create a capacitor model that would take into account its derating factor. The derating factor lowers the capacitance as the capacitor's voltage increases. Do you have any idea to achieve that ? My attempt to create this model is on this link https://groups.io/g/LTspice/files/Temp/Cap_Derating_factor.zip, but I would be glad to have other ideas too. I also supposed that such model has already been made by someone in the past... Thank you for your future answers and the time you'll spend trying to help me. Yes, there have many non-linear capacitor models written in the past. I guess you didn't bother to check the links previously posted. In the folder link: https://groups.io/g/LTspice/files/z_yahoo/Tut/Nonlinear%20Capacitance%20of%20Capacitors, you will find, for example: https://groups.io/g/LTspice/files/z_yahoo/Tut/Nonlinear%20Capacitance%20of%20Capacitors/nonlinear_capacitance.asc and https://groups.io/g/LTspice/files/z_yahoo/Tut/Nonlinear%20Capacitance%20of%20Capacitors/nonlinear_capacitance.plt ..which detail several different methods of creating non-linear capacitors. The folder also contains quite a number of other files and ideas for non-linear capacitors and components apart from capacitors. -- Regards, Tony
lucie.camp26@gmail.com Всі повідомлення цього користувача #154564 "Also there was this message, which was posted here just a few hours ago: https://groups.io/g/LTspice/message/154544 But that was a reply to someone also named lucie.camp26. Perhaps you know them. It really helps to READ the messages that are already here. Andy" Thank you for your generous answers Andy, I appreciate the time you take to help me. No need for sarcasm though, this message you quoted was never an answer directed to me. Futhermore, you can see in the .asc file that I uploaded, that I had already seen the paper this message refers to (see the equation in my TANH model). I still have issues with the equations presented there since it creates an abrupt change in the voltage curve, which I would like to smooth. I did read the other messages, but I also considered that my researches probably weren't exhaustive and asked away in the most general way I could, so that I could get other opinions and point of views.
Andy I Всі повідомлення цього користувача #154565 Змінено Sorry, the wrong message number was copied when I wrote that. It should have been this: https://groups.io/g/LTspice/message/154559 which definitely was a reply to "lucie", and was posted there a few hours before you asked your question again. (I hate it when copy/paste ends up pasting the wrong text, I guess because the copy action failed.) What you asked was: "I am trying to create a capacitor model that would take into account its derating factor. The derating factor lowers the capacitance as the capacitor's voltage increases. Do you have any idea to achieve that ?" So if you already knew how to do that, it is curious why you asked how to do that. Andy
lucie.camp26@gmail.com Всі повідомлення цього користувача #154566 "Yes, there have many non-linear capacitor models written in the past. I guess you didn't bother to check the links previously posted. In the folder link: https://groups.io/g/LTspice/files/z_yahoo/Tut/Nonlinear%20Capacitance%20of%20Capacitors, you will find, for example: https://groups.io/g/LTspice/files/z_yahoo/Tut/Nonlinear%20Capacitance%20of%20Capacitors/nonlinear_capacitance.asc and https://groups.io/g/LTspice/files/z_yahoo/Tut/Nonlinear%20Capacitance%20of%20Capacitors/nonlinear_capacitance.plt ..which detail several different methods of creating non-linear capacitors. The folder also contains quite a number of other files and ideas for non-linear capacitors and components apart from capacitors." Many thanks for your answer Tony. Like I said, I did check the previous messages and files. I did try the IF option in the charge equation too, but it did not seem to fit my model, or did not work better than what I did in my .asc file with switches. The point of my question was to see if someone had used another track I wasn't aware of, which apparently isn't the case. Once again, there is no need to be aggressive. Thanks again for your time, I will try not to bother you anymore.
Andy I Всі повідомлення цього користувача #154567 Suggestion: Please don't write messages using a black background. It makes parts of them unreadable. Andy

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